1. Field of the Invention
The present invention relates to a method of driving a plasma display panel and apparatus thereof, and more particularly, to a method of driving a plasma display panel in which the margin of an address discharge and a sustain discharge are increased through a stabilized reset operation, apparatus thereof.
2. Description of the Background Art
A plasma display panel (hereinafter, referred to as a ‘PDP’) is adapted to display an image by light-emitting phosphors with ultraviolet generated during the discharge of an inert mixed gas such as He+Xe, Ne+Xe or He+Ne+Xe. This PDP can be easily made thin and large, and it can provide greatly increased image quality with the recent development of the relevant technology.
FIG. 1 is a perspective view illustrating the construction of a discharge cell of a three-electrode AC surface discharge type PDP in a prior art.
Referring to FIG. 1, the discharge cell of the three-electrode AC surface discharge type PDP includes a scan electrode 30Y and a sustain electrode 30Z which are formed on the bottom surface of an tipper substrate 10, and an address electrode 20X formed on a lower substrate 18. The scan electrode 30Y includes a transparent electrode 12Y, and a metal bus electrode 13Y which has a line width smaller than that of the transparent electrode 12Y and is disposed at one edge side of the transparent electrode. The sustain electrode 30Z includes a transparent electrode 12Z, and a metal bus electrode 13Z which has a line width smaller than that of the transparent electrode 12Z and is disposed at one side edge of the transparent electrode.
The transparent electrodes 12Y, 12Z, which are typically made of ITO (indium tin oxide), are formed on the bottom surface of the upper substrate 10. The metal bus electrodes 13Y, 13Z, which are typically made of chrome (Cr), are formed on the transparent electrodes 12Y, 12Z, and serve to reduce a voltage drop caused by the transparent electrodes 12Y, 12Z having high resistance. On the bottom surface of the upper substrate 10 in which the scan electrodes 30Y and the sustain electrodes 30Z are placed in parallel with each other are laminated an upper dielectric layer 14 and a protective layer 16. On the upper dielectric layer 14 are accumulated wall charges generated during plasma discharge. The protective layer 16 serves to prevent the upper dielectric layer 14 from being damaged due to sputtering generated during the plasma discharge, and improve efficiency of secondary electron emission. Magnesium oxide (MgO) is typically used as the protective layer 16.
A lower dielectric layer 22 and barrier ribs 24 are formed on the lower substrate 18 in which the address electrode 20X is formed. A phosphor layer 26 is coated on the surface of the lower dielectric layer 22 and barrier ribs 24. The address electrodes 20X are formed in the direction in which they intersect the scan electrodes 30Y and the sustain electrodes 30Z. The barrier ribs 24 are formed in parallel with the address electrodes 20X to prevent ultraviolet and a visible ray generated by the discharge from leaking toward neighboring discharge cells. The phosphor layer 26 is excited with an ultraviolet generated during the plasma discharging to generate a visible light of any one of red, green and blue lights. An inert mixed gas is injected into the discharge spaces defined between the upper substrate 10 and the barrier ribs 24 and between the lower substrate 18 and the barrier ribs 24.
The PDP is time-driven with one frame being divided into several sub-fields having a different number of emission in order to implement the gray scale of an image. Each of the sub-fields is divided into a reset period for initializing the entire screen, an address period for selecting a scan line and selecting a cell from the selected scan line, and a sustain period for implementing the gray scale depending on the number of a discharge.
In this time, the reset period is divided into a set-up period where a ramp-up pulse is supplied and a set-down period were a ramp-down pulse is supplied, in plural. For example, if it is desired to display an image with 256 gray scale, a frame period (16.67 ms) corresponding to 1/60 seconds is divided into eight sub-fields SF1 to SF8, as shown in FIG. 2. Furthermore, each of the eight sub-fields SF1 to SF8 is subdivided into a reset period, an address period and a sustain period. In this time, the reset period and the address period of each of the sub-fields are the same every sub-field, whereas the sustain period and the number of a sustain pulse allocated thereto are increased in the ratio of 2n(n=0,1,2,3,4,5,6,7) in each sub-field.
FIG. 3 shows a driving waveform of a PDP, which is supplied two sub-fields.
In FIG. 3, Y indicates scan electrodes, Z indicates sustain electrodes and X indicates address electrodes.
Referring to FIG. 3, the PDP is driven with it being divided into a reset period for initializing the entire screen, an address period for selecting a cell, and a sustain period for maintaining a discharge of the selected cell.
In a set-up period of the reset period, a ramp-up pulse Ramp-up is applied to all scan electrodes Y at the same time. A weak discharge is generated within cells of the entire screen by means of the ramp-up pulse Ramp-up and wall charges are thus created within the cells. In a set-down period, a ramp-down pulse Ramp-down, which drops from a voltage of the positive polarity lower than the peak voltage of the ramp-up pulse Ramp-up, is applied to the scan electrodes Y at the same time. The ramp-down pulse Ramp-down generates a weak erase discharge within the cells, so that the wall charges generated by the set-up discharge and unnecessary charges among space charges are erased and wall charges necessary for an address discharge uniformly remain within the cells of the entire screen.
In the address period, simultaneously when a scan pulse scan of the negative polarity is sequentially applied to the scan electrodes Y, a data pulse data of the positive polarity is applied to the address electrodes X. As a voltage difference between the scan pulse scan and the data pulse data and a wall voltage generated in the reset period are added, the address discharge is generated within cells to which the data pulse data is applied. Also, wall charges are generated within cells selected by the address discharge.
Meanwhile, during the set-down period and the address period, a positive-polarity DC voltage of a sustain voltage level (Vs) is applied to the sustain electrodes Z.
In the sustain period, a sustain pulse Sus is alternately applied to the scan electrodes Y and the sustain electrodes Z. Then, in cells selected by the address discharge, a sustain discharge is generated between the scan electrodes Y and the sustain electrodes Z in the surface discharge shape whenever the sustain pulse Sus is applied as the wall voltage within the cells and the sustain pulse Sus are added. Lastly, after the sustain discharge is completed, an erase ramp pulse erase having a narrow pulse width is applied to the sustain electrodes Z, thus erasing the wall charges within the cells.
Meanwhile, there has been proposed a structure in which a discharge space is widened by increasing the height h of a barrier rib 24 so as to improve the emission efficiency of the PDP, as shown in FIG. 4. If the height of the barrier rib 24 is increased, however, a discharge firing voltage of an opposite discharge is increased. It is thus necessary to further lower the voltage of the ramp-down pulse Ramp-down. In this case, an excessive discharge is generated between the scan electrodes Y and the sustain electrodes Z. An erroneous discharge is thus generated in the address period or the sustain period.
This will be below described in detail. If the ramp-up pulse Ramp-up is applied to the scan electrodes Y in the set-up period, a discharge is generated between the scan electrodes Y and the sustain electrodes Z. Wall charges of the negative polarity are thus formed in the scan electrodes Y, as shown in FIG. 5a. It in turn means that a voltage of the negative polarity is applied to the sustain electrodes Z and the address electrodes X compared with the scan electrodes Y. Wall charges of the positive polarity are thus formed in the sustain electrodes Z and the address electrodes X. Thereafter, if the ramp-down pulse Ramp-down is applied to the scan electrodes Y and the DC voltage of the positive polarity is applied to the sustain electrodes Z in a set-down period, a weak discharge is generated between the scan electrodes Y and the sustain electrodes Z, thus erasing the wall charges. Accordingly, wall charges are formed, as shown in FIG. 5b. If the height of the barrier rib is increased so as to improve the discharge efficiency, however, a distance between the scan electrodes Y and the address electrodes Z becomes far. Therefore, in order to generate a discharge between the scan electrodes Y and the address electrodes X, it is required that the ramp-down pulse Ramp-down be lower than the discharge firing voltage for generating the discharge between the scan electrodes Y and the address electrodes X. Accordingly, an excessive discharge is generated between the scan electrodes Y and the sustain electrodes Z, the wall charges in the scan electrodes Y and the sustain electrodes Z are excessively erased, as shown in FIG. 5c. Therefore, there is a problem in that the margin of the address discharge and the sustain discharge is lowered since the wall charges are severely reversed.